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Russell A Blaine

from San Carlos, CA
Age ~46
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Also known as:
Russell Alexander Blaine, Russell P Blaine, Rus Blaine, Blaine Russell, Blaine Rus
Phone and address:
735 Orange Ave, San Carlos, CA 94070
(510) 225-8158
Related to:
Randolph H Schmidt, 91
Connected to:
Alexander M Blaine, 30Autumn BlaineCrystal J Blaine, 42Dee A Blaine, 74Della K Blaine, 60Floyd Blaine, 96Fred G Blaine, 57Garrett K Blaine, 46Mandy S Blaine, 51Alana K Blair, 54

Russell Blaine Phones & Addresses

  • 735 Orange Ave, San Carlos, CA 94070 (510) 225-8158
  • Lower Lake, CA
  • Portland, ME
  • San Mateo, CA
  • 575 Cole St, San Francisco, CA 94117 (415) 752-0730
  • 1140 Pine St, San Francisco, CA 94109 (415) 292-6696
  • 1280 Pine St, San Francisco, CA 94109 (415) 440-4315
  • Winchester, MA
  • Princeton, NJ
  • 360 Guerrero St APT 205, San Francisco, CA 94103

Work

Position: Professional/Technical

Education

Degree: Graduate or professional degree

Emails

r***[email protected]

Publications

Wikipedia

Russel B. Nye

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Russel Blaine Nye (February 17, 1913 September 2, 1993) was an American professor of English who pioneered in popular culture studies. He is the author of a

Us Patents

Enhanced Debugging For Embedded Devices

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US Patent:
20130212425, Aug 15, 2013
Filed:
Sep 14, 2012
Appl. No.:
13/620133
Inventors:
Russell A. Blaine - San Francisco CA, US
Matthew Byom - San Jose CA, US
Kevi Rathbun Walker - San Jose CA, US
Daniel S. Heller - San Francisco CA, US
Shantonu Sen - Mountain View CA, US
International Classification:
G06F 11/20
US Classification:
714 61, 714E11071
Abstract:
Methods, machine-readable tangible storage media, and data processing systems that enable a debug host device to acquire memory dump information from a debug target device after the target device suffers an unrecoverable system malfunction are disclosed. In one embodiment, data in the volatile memory on a debug target device is accessed via a hardware integrated debug framework, which is also used to access data on a nonvolatile electronically erasable semiconductor memory of a debug target device, and one or more registers of one or more processors on a debug target device, and a core dump is created on the debug host device.

Guarded File Descriptors

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US Patent:
20130339313, Dec 19, 2013
Filed:
Sep 15, 2012
Appl. No.:
13/620733
Inventors:
Russell A. BLAINE - San Francisco CA, US
Timothy P. Marsland - Half Moon Bay CA, US
Benjamin H. Nham - San Francisco CA, US
Adam C. Swift - San Jose CA, US
Benjamin C. Trumbull - San Jose CA, US
Umesh S. Vaishampayan - Santa Clara CA, US
Assignee:
Apple Inc. - Cupertino CA
International Classification:
G06F 17/30
US Classification:
707691
Abstract:
Guarded file access operations are provided for creating and using guarded file descriptors, which can detect and prevent erroneous file access operations in computer programs. A file descriptor can be associated with a guard identifier to create a guarded file descriptor. The association can be established when the file is opened, and can be maintained independently of the computer program, which ordinarily maintains its own association between files, file descriptors, and guard identifiers. Subsequent file operations using the guarded file descriptor check that the guard identifier previously associated with that file descriptor is presented, and generate errors without performing the requested file operations if the correct guard identifier is not presented. This check serves as a validation of the computer program's use of file descriptors. An error and stack trace can be generated for use in analyzing a cause of the guard violation.

Method For Defining Non-Native Operating Environments

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US Patent:
7689566, Mar 30, 2010
Filed:
Dec 12, 2006
Appl. No.:
11/637989
Inventors:
Nils A. Nieuwejaar - Santa Clara CA, US
Eric N. Schrock - Santa Clara CA, US
William J. Kucharski - Santa Clara CA, US
Russell A. Blaine - Santa Clara CA, US
Edward K. Pilatowicz - Santa Clara CA, US
Adam H. Leventhal - Santa Clara CA, US
Assignee:
Sun Microsystems, Inc. - Santa Clara CA
International Classification:
G06F 17/30
US Classification:
707 10, 707 4
Abstract:
Methods and systems for defining the partitioning between operating system environments are provided. In this method, network resources, devices, and pseudo-filesystems, etc. can be partitioned. This method provides the capability to support services from native and foreign operating environments without colliding on fixed resources. This method simplifies the task of supporting multiple different operating environments. By assigning each operating environment to its own zone, multiple instances of a single operating environment or multiple different operating environments can be simultaneously supported on a single operating system kernel.

Memory Management In Data Processing Systems

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US Patent:
20220222116, Jul 14, 2022
Filed:
Mar 21, 2022
Appl. No.:
17/699911
Inventors:
- Cupertino CA, US
Andrey V. Talnikov - Santa Clara CA, US
Lionel D. Desai - San Francisco CA, US
Russell A. Blaine - San Carlos CA, US
International Classification:
G06F 9/50
G06F 11/34
G06F 11/30
Abstract:
Memory management in a data processing system can learn one or more behaviors of software processes such as daemon software processes and application processes, and based on information learned about the behaviors, the memory management can adjust how it controls memory usage in the system. For example, a memory management system can learn how software processes react (e.g. how quickly they relaunch) to memory recovery methods, such as system initiated terminations of one or more software processes that are performed to reclaim memory to increase available volatile memory, and based on information about how they react, the memory recovery methods can operate differently depending upon how the software reacted previously.

Execution Space Agnostic Device Drivers

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US Patent:
20210365389, Nov 25, 2021
Filed:
Aug 9, 2021
Appl. No.:
17/397966
Inventors:
- Cupertino CA, US
Joseph R. Auricchio - Redwood City CA, US
Russell A. BLAINE - San Carlos CA, US
Daniel A. CHIMENE - San Francisco CA, US
Simon M. DOUGLAS - Cupertino CA, US
Landon J. FULLER - Cupertino CA, US
Yevgen GORYACHOK - Los Gatos CA, US
Arnold S. LIU - Mountain View CA, US
James M. MAGEE - Orlando FL, US
Daniel A. STEFFEN - San Francisco CA, US
Roberto G. YEPEZ - San Francisco CA, US
International Classification:
G06F 13/10
G06F 13/40
G06F 9/54
G06F 9/445
G06F 13/16
Abstract:
Embodiments described herein provide techniques to manage drivers in a user space in a data processing system. One embodiment provides a data processing system configured perform operations, comprising discovering a hardware device communicatively coupled to the communication bus, launching a user space driver daemon, establishing an inter-process communication (IPC) link between a first proxy interface for the user space driver daemon and a second proxy interface for a server process in a kernel space, receiving, at the first proxy interface, an access right to enable access to a memory buffer in the kernel space, and relaying an access request for the memory buffer from the user space driver daemon via a third-party proxy interface to enable the user space driver daemon to access the memory buffer, the access request based on the access right.

Scheduler For Amp Architecture With Closed Loop Performance And Thermal Controller

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US Patent:
20210318909, Oct 14, 2021
Filed:
Mar 22, 2021
Appl. No.:
17/208928
Inventors:
- Cupertino CA, US
John G. Dorsey - San Francisco CA, US
James M. Magee - Orlando FL, US
Daniel A. Chimene - San Francisco CA, US
Cyril de la Cropte de Chanterac - San Francisco CA, US
Bryan R. Hinch - Mountain View CA, US
Aditya Venkataraman - Sunnyvale CA, US
Andrei Dorofeev - San Jose CA, US
Nigel R. Gamble - San Francisco CA, US
Russell A. Blaine - San Carlos CA, US
Constantin Pistol - Cupertino CA, US
James S. Ismail - Sunnyvale CA, US
International Classification:
G06F 9/50
G06F 9/48
G06F 1/3234
G06F 1/329
G06F 1/3296
G06F 9/38
G06F 9/26
G06F 9/54
G06F 1/20
G06F 1/324
Abstract:
Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.

Memory Management In Data Processing Systems

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US Patent:
20200379810, Dec 3, 2020
Filed:
Mar 3, 2020
Appl. No.:
16/808021
Inventors:
- Cupertino CA, US
Andrey V. Talnikov - Santa Clara CA, US
Lionel D. Desai - San Francisco CA, US
Russell A. Blaine - San Carlos CA, US
International Classification:
G06F 9/50
G06F 11/30
G06F 11/34
Abstract:
Memory management in a data processing system can learn one or more behaviors of software processes such as daemon software processes and application processes, and based on information learned about the behaviors, the memory management can adjust how it controls memory usage in the system. For example, a memory management system can learn how software processes react (e.g. how quickly they relaunch) to memory recovery methods, such as system initiated terminations of one or more software processes that are performed to reclaim memory to increase available volatile memory, and based on information about how they react, the memory recovery methods can operate differently depending upon how the software reacted previously.

Execution Space Agnostic Device Drivers

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US Patent:
20200379925, Dec 3, 2020
Filed:
May 22, 2020
Appl. No.:
16/882087
Inventors:
- Cupertino CA, US
Joseph R. Auricchio - Redwood City CA, US
Russell A. Blaine - San Carlos CA, US
Daniel A. Chimene - San Francisco CA, US
Simon M. Douglas - Cupertino CA, US
Landon J. Fuller - Cupertino CA, US
Yevgen Goryachok - Los Gatos CA, US
Arnold S. Liu - Mountain View CA, US
James M. Magee - Orlando FL, US
Daniel A. Steffen - San Francisco CA, US
Roberto G. Yepez - San Francisco CA, US
International Classification:
G06F 13/10
G06F 13/40
G06F 9/54
G06F 9/445
G06F 13/16
Abstract:
Embodiments described herein provide techniques to manage drivers in a user space in a data processing system. One embodiment provides a data processing system configured perform operations, comprising discovering a hardware device communicatively coupled to the communication bus, launching a user space driver daemon, establishing an inter-process communication (IPC) link between a first proxy interface for the user space driver daemon and a second proxy interface for a server process in a kernel space, receiving, at the first proxy interface, an access right to enable access to a memory buffer in the kernel space, and relaying an access request for the memory buffer from the user space driver daemon via a third-party proxy interface to enable the user space driver daemon to access the memory buffer, the access request based on the access right.
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Russell A Blaine from San Carlos, CA, age ~46 Get Report