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Sushama A Ghanekar

from San Jose, CA
Age ~62
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Also known as:
Sushama Ghanekar, Sushama Aruind Ghanekar
Phone and address:
1125 Craig Dr, San Jose, CA 95129
Related to:
Richard B Armstrong, 66Sujata Ghanekar, 61Avanti A Ghanekar, 39Arvind R Ghanekar, 66Bala M Rajappan, 62Raghunath GhanekarGovindan S Nair
Connected to:
Amer G Ghanem, 41Amr Ghanem, 40Elias F Ghanem, 84Guy L Ghanem, 49Louis R Ghanem, 52Najeeb B Ghanem, 38Ola Ghanem, 52Raja N Ghanem, 49Aslam Ghani, 27Karo L Ghani, 52

Sushama Ghanekar Phones & Addresses

  • 1125 Craig Dr, San Jose, CA 95129
  • Sunnyvale, CA
  • Cupertino, CA
  • Oakland, CA
  • Santa Clara, CA

Work

Company: Xilinx Apr 2001 to Apr 2009 Position: Software engineer

Education

Degree: Master of Science, Masters School / High School: The University of Memphis 1985 to 1987

Skills

Verilog • Tcl • Fpga • Vhdl • Perl • Eda • Simulations • C++ • Software Development

Industries

Semiconductors

Resumes

Resumes

Sushama Ghanekar Photo 1

College Of Engineering Pune

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Location:
San Francisco, CA
Industry:
Semiconductors
Work:
Xilinx Apr 2001 - Apr 2009
Software Engineer
Actel Jan 1993 - Sep 1994
Software Engineer
National Semiconductor Aug 1987 - Dec 1992
Software Engineer
Memphis State University Sep 1986 - May 1987
Graduate Teaching Assistant
Sep 1986 - May 1987
College of Engineering Pune
Education:
The University of Memphis 1985 - 1987
Master of Science, Masters College of Engineering Pune
Bachelor of Engineering, Bachelors, Electronics
Skills:
Verilog
Tcl
Fpga
Vhdl
Perl
Eda
Simulations
C++
Software Development

Publications

Us Patents

Dangling Reference Detection And Garbage Collection During Hardware Simulation

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US Patent:
7403961, Jul 22, 2008
Filed:
Mar 14, 2003
Appl. No.:
10/388935
Inventors:
Kumar Deepak - San Jose CA, US
Sushama Ghanekar - San Jose CA, US
Sonal Santan - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 12/00
G06F 17/30
G06F 17/50
G06F 11/00
US Classification:
707206, 707200, 703 13
Abstract:
A method of dangling reference detection and garbage collection of VHDL objects within a program includes the steps of providing an Access Value having an Object Reference pointing to an Allocated Object and having and an Access Count pointer pointing to an integer object named Access Count which models a shared access count for the access values. The method sets the Object Reference and the Access Count pointer to null when constructing a new access value and enables an assignment of a negative Access Count to the shared access count when de-allocating a pointer to the Allocated Object. The method also maintains an exact count of a number of pointers pointing to the Allocated Object.

Method And Apparatus For Processing A Circuit Description For Logic Simulation

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US Patent:
7191412, Mar 13, 2007
Filed:
Sep 28, 2005
Appl. No.:
11/238432
Inventors:
Wei Lin - Santa Clara CA, US
Sushama Ghanekar - San Jose CA, US
Jimmy Zhenming Wang - Saratoga CA, US
Kumar Deepak - San Jose CA, US
Assignee:
Xilinx, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 3, 716 12
Abstract:
Method and apparatus for processing a circuit description including a hierarchy of components for logic simulation is described. Each component is described using one of a first hardware description language (HDL) and a second HDL. A root component and each component in the hierarchy below the root component described using an HDL identical to that of the root component is elaborated up to a cross-language boundary. The root component is described using one of the first HDL or the second HDL and each component at the cross-language boundary is described using the other of the first HDL or the second HDL. Each component at the cross-language boundary is stored in one of a first vector associated with the first HDL or a second vector associated with the second HDL based on language. A connection is established between each component at the cross-language boundary and a respective parent component.
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Sushama A Ghanekar from San Jose, CA, age ~62 Get Report