Brian K Forbes

45077320, Mar 26, 1985

Sep 7, 1983

6/529005

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 1300

364200

An I/O subsystem uses a peripheral-controller for handling data transfer operations between a host computer and a plurality of peripheral terminals. The peripheral controller is made of (a) a universal processor, which generates instructions for executing data transfer operations, and (b) an application dependent logic module which particularly adapts the instructions to each peripheral terminal connected to the system. Upon recognition of the use of addresses for slow memories, slow registers or "slow devices", control logic in the application dependent logic module controls the clocking in the universal processor to slow data transfer rates for data being placed in or removed from the "slow devices".

43744168, Feb 15, 1983

Dec 15, 1980

6/216761

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 300
G06F 1300

364200

A microprocessor system having linear program sequencing and working in conjunction with an application dependent logic module tailored to handle the requirements of a variety of types of peripheral devices and wherein a microprocessor operates as a universal standard for all types of different application dependent logic modules. Means are provided for the microprocessor to access a total word from memory or to access any selected byte of a word in memory. Thus, the microprocessor and the application dependent logic module constitute a peripheral-controller which can control and monitor data transfer operations between a main host computer and a variety of peripheral devices whether such peripheral devices are "byte" oriented, such as card readers, or whether the peripheral terminal unit is "word" oriented such as magnetic tape or disk peripheral units.

42913721, Sep 22, 1981

Jun 27, 1979

6/052350

Brian K. Forbes - Huntington Beach CA
Robert D. Catiller - Garden Grove CA

Burroughs Corporation - Detroit MI

G06F 304

364200

A microprocessor system which works in conjunction with an external application dependent logic module which logic module handles the specific requirements for data transfer to and from a peripheral device. The system includes a microprocessor which provides a program memory having a specialized instruction format. The instruction word format provides a single bit field for selecting either a program counter or a memory reference register as the source of memory addresses, a function field which defines the route of data transfers to be made, and a source and destination field for addressing source and destination locations.

42901065, Sep 15, 1981

Jun 27, 1979

6/052477

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 1300

364200

A microprocessor system having control lines and bus connections to an application dependent logic module having control logic, external registers and external memory for data transfers to/from a specific type of peripheral device. Addressing means are provided in said microprocessor whereby a program counter is used to address program memory and a memory reference register is used to provide addresses for access to external memory, and said memory reference register includes a low order bit field which selects whether the program counter or the memory reference register will be the address source for memory accesses.

43793282, Apr 5, 1983

Dec 15, 1980

6/216681

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 930
G06F 1300
G06F 304

364200

A microprocessor system in which a microprocessor with a linear sequencing circuit works with arithmetic logic, program memory, registers, and other support circuitry to provide control lines and bus connections to an external application dependent logic module which has control logic, external registers and external memory and is oriented to handle the specific requirements for data transfers to and from a particular type of peripheral device. Means are provided in said microprocessor for selecting the number of times an instruction word is to be repeated and for the halting of a repeated instruction by internal or external means.

43719317, Feb 1, 1983

Mar 5, 1981

6/240880

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 304
G06F 930
G06F 1300
G06F 900

364200

A microprocessor system comprising an arithmetical logic unit, a program memory and an external memory, memory address means (including a program counter and a memory reference register) for addressing either the program memory or the external memory. The microprocessor is sequenced by a linear sequencing circuit which can use different size plug-compatible PROMs. An instruction register receives instructions from either program memory or external memory along an instruction bus, which instructions are conveyed via a memory operand register to the arithmetic logic unit. The program memory is provided with a specialized instruction word format. The instruction word format provides: a single bit field for selecting either the program counter or the memory reference register as the source of memory addresses; it provides a function field which defines the route of data transfers to be made; and provides a "source and destination" field for addressing selected source and destination locations.

42939097, Oct 6, 1981

Jun 27, 1979

6/052336

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 304

364200

A digital system which a main host computer is connected for communication with a plurality of base modules. Each base module supports a plurality of peripheral-controllers which include an application dependent logic module for handling the specific needs in data transfers to/from a particular type of peripheral device. Each peripheral-controller comprises a universal standardized microprocessor which works in conjunction with said application dependent logic module. Means are provided in the microprocessor and the microprocessor system operating with said application dependent logic module to control and handle data transfer functions between said main host computer system and remote peripheral devices.

43015050, Nov 17, 1981

Jun 27, 1979

6/052478

Robert D. Catiller - Garden Grove CA
Brian K. Forbes - Huntington Beach CA

Burroughs Corporation - Detroit MI

G06F 304

364200

A microprocessor system working in conjunction with an application dependent logic module tailored to handle the requirements of a variety of types of peripheral devices and wherein a microprocessor operates as a universal standard for all types of different application dependent logic modules. Means are provided for the microprocessor to access a total word from memory or to access any selected byte of a word in memory. Thus, the microprocessor and the application dependent logic module constitute a peripheral-controller which can control and monitor data transfer operations between a main host computer and a variety of peripheral devices whether such peripheral devices are "byte" oriented, such as card readers, or whether the peripheral terminal unit is "word" oriented such as magnetic tape or disk peripheral units.