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Cheng Young Liao

from Fremont, CA
Age ~66

Cheng Liao Phones & Addresses

  • 40645 Ladero St, Fremont, CA 94539 (510) 249-9227
  • Pleasanton, CA
  • San Jose, CA
  • Plano, TX
  • San Diego, CA

Resumes

Resumes

Cheng Liao Photo 1

Senior Member Of Technical Staff - Sgi

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Location:
Pleasanton, CA
Industry:
Computer Hardware
Work:
Sgi
Senior Member of Technical Staff - Sgi
Education:
Georgia Institute of Technology
Doctorates, Doctor of Philosophy, Philosophy
Cheng Liao Photo 2

Cheng Liao

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Cheng Liao Photo 3

Cheng Liao

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Publications

Us Patents

Universal User Input/Output Application Layers

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US Patent:
20080295118, Nov 27, 2008
Filed:
May 23, 2007
Appl. No.:
11/752914
Inventors:
Cheng LIAO - Fremont CA, US
International Classification:
G06F 3/00
US Classification:
719328
Abstract:
Files on a secondary storage are accessed using alternative IO subroutines that buffer IO requests made by a user and mimic the IO subroutines provided by an operating system. The buffer used by the alternative IO subroutines is maintained by the user and not the operating system. User applications are not recompiled or relinked when using the alternative subroutines because the library that provides these subroutines intercepts requests for buffered IO made by user applications to the operating system's IO subroutines and replaces the requests with calls to the alternative IO subroutines that utilize the buffer maintained by the user.

Shared Memory Eigensolver

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US Patent:
20170228267, Aug 10, 2017
Filed:
Jan 17, 2017
Appl. No.:
15/408092
Inventors:
- MILPITAS CA, US
Cheng Liao - Pleasanton CA, US
International Classification:
G06F 9/54
G06F 9/48
G06F 9/50
G06F 17/16
Abstract:
Disclosed herein is a shared memory systems that use a combination of SBR and MRRR techniques to calculate eigenpairs for dense matrices having very large numbers of rows and columns. The disclosed system allows for the use of a highly scalable tridiagonal eigensolver. The disclosed system likewise allows for allocating a different number of threads to each of the different computational stages of the eigensolver.

Shared Memory Eigensolver

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US Patent:
20160299874, Oct 13, 2016
Filed:
Apr 18, 2016
Appl. No.:
15/132085
Inventors:
- Milpitas CA, US
Cheng Liao - Pleasanton CA, US
International Classification:
G06F 17/16
Abstract:
Disclosed herein is a shared memory system that use a combination of SBR and MRRR techniques to calculate eigenpairs for dense matrices having very large numbers of rows and columns. The disclosed system allows for the use of a highly scalable tridiagonal eigensolver. The disclosed system likewise allows for allocating a different number of threads to each of the different computational stages of the eigensolver.

Shared Memory Eigensolver

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US Patent:
20150130825, May 14, 2015
Filed:
Nov 7, 2014
Appl. No.:
14/536477
Inventors:
- Milpitas CA, US
Cheng Liao - Pleasanton CA, US
International Classification:
G06T 1/60
US Classification:
345543
Abstract:
A method for computing eigenvectors and eigenvalues of a square matrix in a high performance computer involves dynamically reallocating the computer's computing cores for various phases of the computation process.

Shared Memory Eigensolver

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US Patent:
20150134714, May 14, 2015
Filed:
Nov 10, 2014
Appl. No.:
14/537839
Inventors:
- Milpitas CA, US
Cheng Liao - Pleasanton CA, US
International Classification:
G06F 17/16
US Classification:
708250
Abstract:
Disclosed herein is a shared memory systems that use a combination of SBR and MRRR techniques to calculate eigenpairs for dense matrices having very large numbers of rows and columns. The disclosed system allows for the use of a highly scalable tridiagonal eigensolver. The disclosed system likewise allows for allocating a different number of threads to each of the different computational stages of the eigensolver.

Scalable Matrix Multiplication In A Shared Memory System

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US Patent:
20140331014, Nov 6, 2014
Filed:
Sep 30, 2013
Appl. No.:
14/041974
Inventors:
- Fremont CA, US
Cheng Liao - Pleasanton CA, US
Assignee:
Silicon Graphics International Corp. - Fremont CA
International Classification:
G06F 12/00
US Classification:
711147
Abstract:
High performance computing systems perform complex or data-intensive calculations using a large number of computing nodes and a shared memory. Disclosed methods and systems provide nodes having a special-purpose coprocessor to perform these calculations, along with a general-purpose processor to direct the calculations. Computational data transfer from the shared memory to the coprocessor incurs a data copying latency. To reduce this latency as experienced by the coprocessor, a complex computation is divided into work units, and one or more threads executing on the processor copy the work units from the shared memory to a local buffer memory of a computing node. By buffering these data for transfer from the local memory to coprocessor memory, and by ensuring that new data are copied while the coprocessor operates on older data, data copying latency is hidden from the coprocessor.
Cheng Young Liao from Fremont, CA, age ~66 Get Report