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Faye Alaye Briggs

from Missouri City, TX
Age ~76
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Also known as:
Faye Alaye Dr Briggs, Faye A Briggs, Faye A Briggsd, Faye A Cisggs, Faye B Riggs, Faye A Brigsg, Faye R, Miguel Vega
Related to:
La Nita Myles, 49Andre F Briggs, 41D Briggs, 66Ibifuro Briggs, 49Daketima G Briggs, 68Tutu BriggsD Briggs, 60Adaba S Briggs, 41Seleipiri Briggs, 42
Connected to:
Al L Briggs, 100Alena D Briggs, 40Bobbiejo M Briggs, 45Brenell Briggs, 48Britt L Briggs, 45Callie Briggs, 40Chanel BriggsChelsi A Briggs, 38Christi N Briggs, 54Colton D Briggs, 31

Faye Briggs Phones & Addresses

  • Missouri City, TX
  • 7 Elderberry Trce, Sugar Land, TX 77479 (503) 975-7890
  • 1230 Frazier Ct, Portland, OR 97229
  • 7202 Via Vico, San Jose, CA 95129
  • Mobile, AL
  • Austin, TX
  • Houston, TX

Business Records

Name / Title
Company / Classification
Phones & Addresses
Faye Briggs
CTO
Intel Corporation
Computers-System Designers & C · Other Computer Peripheral Equipment Manufacturing
2111 NE 25 Ave, Hillsboro, OR 97124
(503) 696-8080, (503) 264-6969, (503) 264-6245, (503) 264-5550
Faye Briggs
President
NIMINET COMMUNICATIONS
7202 Via Vico, San Jose, CA 95129

Publications

Us Patents

Method And Apparatus For Centralized Snoop Filtering

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US Patent:
6810467, Oct 26, 2004
Filed:
Aug 21, 2000
Appl. No.:
09/643382
Inventors:
Manoj Khare - Saratoga CA
Faye A. Briggs - Portland OR
Kai Cheng - Portland OR
Lily Pao Looi - Portland OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 1208
US Classification:
711146, 711144, 711145, 711140
Abstract:
An example embodiment of a computer system utilizing a central snoop filter includes several nodes coupled together via a switching device. Each of the nodes may include several processors and caches as well as a block of system memory. All traffic from one node to another takes place through the switching device. The switching device includes a snoop filter that tracks cache line coherency information for all caches in the computer system. The snoop filter has enough entries to track the tags and state information for all entries in all caches in all of the systems nodes. In addition to the tag and state information, the snoop filter stores information indicating which of the nodes has a copy of each cache line. The snoop filter serves in part to keep snoop transactions from being performed at nodes that do not contain a copy of the subject cache line, thereby reducing system overhead, reducing traffic across the system interconnect busses, and reducing the amount of time required to perform snoop transactions.

Method And Apparatus For Reducing Memory Latency In A Cache Coherent Multi-Node Architecture

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US Patent:
7234029, Jun 19, 2007
Filed:
Dec 28, 2000
Appl. No.:
09/749660
Inventors:
Manoj Khare - Saratoga CA, US
Faye A. Briggs - Portland OR, US
Akhilesh Kumar - Sunnyvale CA, US
Lily P. Looi - Portland OR, US
Kai Cheng - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/08
G06F 13/00
US Classification:
711146, 711100, 711141
Abstract:
A method for reducing memory latency in a multi-node architecture. In one embodiment, a speculative read request is issued to a home node before results of a cache coherence protocol are determined. The home node initiates a read to memory to complete the speculative read request. Results of a cache coherence protocol may be determined by a coherence agent to resolve cache coherency after the speculative read request is issued.

Preselecting E/M Line Replacement Technique For A Snoop Filter

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US Patent:
7383398, Jun 3, 2008
Filed:
Mar 31, 2006
Appl. No.:
11/394503
Inventors:
Lily P Looi - Portland OR, US
Liqun Cheng - Salt Lake City UT, US
Kai Cheng - Portland OR, US
Faye A Briggs - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/12
US Classification:
711146, 711133
Abstract:
A snoop filter maintains data coherency information for multiple caches in a multi-processor system. When a new request for a memory line arrives, an entry of the snoop filter is selected for replacement if there is no available slot in the snoop filter to accommodate the new request. The selected entry is among the entries predicted to be short-lived based on a coherency state. An invalidation message is sent to the one of the caches with which the selected entry is associated.

Method And Apparatus For Reducing Memory Latency In A Cache Coherent Multi-Node Architecture

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US Patent:
7996625, Aug 9, 2011
Filed:
Apr 30, 2007
Appl. No.:
11/790989
Inventors:
Manoj Khare - Saratoga CA, US
Faye A. Briggs - Portland OR, US
Akhilesh Kumar - Sunnyvale CA, US
Lily P. Looi - Portland OR, US
Kai Cheng - Portland OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 12/00
G06F 13/00
US Classification:
711146, 711100, 711141, 711154
Abstract:
A method for reducing memory latency in a multi-node architecture. In one embodiment, a speculative read request is issued to a home node before results of a cache coherence protocol are determined. The home node initiates a read to memory to complete the speculative read request. Results of a cache coherence protocol may be determined by a coherence agent to resolve cache coherency after the speculative read request is issued.

Distributed Mechanism For Resolving Cache Coherence Conflicts In A Multi-Node Computer Architecture

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US Patent:
20020087804, Jul 4, 2002
Filed:
Dec 29, 2000
Appl. No.:
09/752937
Inventors:
Manoj Khare - Saratoga CA, US
Lily Looi - Portland OR, US
Akhilesh Kumar - Sunnyvale CA, US
Faye Briggs - Portland OR, US
International Classification:
G06F013/00
US Classification:
711/141000
Abstract:
According to one embodiment, a method is disclosed. The method comprises receiving a read request from a first node in a multi-node computer system to read data from a memory at a second node. Subsequently, a write request from a third node is received to write data to the memory at the second node. The read request and write request is detected at conflict detection circuitry. Finally, read data from the memory at the second node is transmitted to the first node.

Mechanism For Efficiently Supporting The Full Mesi (Modified, Exclusive, Shared, Invalid) Protocol In A Cache Coherent Multi-Node Shared Memory System

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US Patent:
20030131201, Jul 10, 2003
Filed:
Dec 29, 2000
Appl. No.:
09/752534
Inventors:
Manoj Khare - Saratoga CA, US
Lily Looi - Portland OR, US
Akhilesh Kumar - Sunnyvale CA, US
Faye Briggs - Portland OR, US
International Classification:
G06F012/08
US Classification:
711/144000, 711/145000, 711/146000, 711/119000
Abstract:
A method and apparatus are described for supporting the full MESI (Modified, Exclusive, Shared or Invalid) protocol in a distributed shared memory environment implementing a snoop based architecture. A requesting node submits a single read request to a snoop based architecture controller switch. The switch recognizes that a responding node other than the requesting node and the home node for the desired data has a copy of the data in an ambiguous state. The switch resolves this ambiguous state by snooping the remote node. After resolving the ambiguous state, the read request transaction is completed.

Way Hint Line Replacement Algorithm For A Snoop Filter

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US Patent:
20070233965, Oct 4, 2007
Filed:
Mar 31, 2006
Appl. No.:
11/395123
Inventors:
Kai Cheng - Portland OR, US
Rob Milstrey - Citrus Heights CA, US
Jeffrey Gilbert - Portland OR, US
Liqun Cheng - Salt Lake City UT, US
Lily Looi - Portland OR, US
Faye Briggs - Portland OR, US
International Classification:
G06F 13/28
US Classification:
711146000
Abstract:
A system and method for maintaining data coherency in a multiprocessor environment. The system includes a snoop filter that maintains a representation of the organization and context of each last level cache on the system. The representative is updated with each request which each include a hint to the location where requested data will be stored in the last level cache.

Isbn (Books And Publications)

Computer Architecture and Parallel Processing

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Author

Faye A. Briggs

ISBN #

0070315566

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Faye Alaye Briggs from Missouri City, TX, age ~76 Get Report