Inventors:
Alexander D. Vasilevsky - Watertown MA
Gary W. Sabot - Cambridge MA
Clifford A. Lasser - Cambridge MA
Lisa A. Tennies - Bedford MA
Tobias M. Weinberg - Somerville MA
Linda J. Seamonson - Wellesley MA
Assignee:
Thinking Machines Corporation - Cambridge MA
International Classification:
G06F 900
Abstract:
The present invention provides a parallel vector machine model for building a compiler that exploits three different levels of parallelism found in a variety of parallel processing machines, and in particular, the Connection Machine. RTM. Computer CM-2 system. The fundamental idea behind the parallel vector machine model is to have a target machine that has a collection of thousands of vector processors each with its own interface to memory. Thus allowing a fine-grained array-based source program to be mapped onto a course-grained hardware made up of the vector processors. In the parallel vector machine model used by CM Fortran 1. 0, the FPUs, their registers, and the memory hiearchy are directly exposed to the compiler. Thus, the CM-2 target machine is not 64K simple bit-serial processors. Rather, the target is a machine containing 2K PEs (processing elements), where each PE is both superpipelined and superscalar.