Gerald L Somer

48093068, Feb 28, 1989

Nov 17, 1986

6/931573

Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H04B 704

375120

In recovering clock information from received data, the voltage input to a voltage controlled oscillator (Q1) forming part of a phase locked loop (Q1, U3A, U2A, U3B, R10, C12, U4) is determined by comparing a voltage signal to a voltage reference that is precisely the midpoint of the voltage swing between a logic 0 and a logic 1 in the circuit. The voltage reference is generated using an exclusive OR gate (U3B) having one input tied to either the circuit voltage representing a logic 0 or the circuit voltage representing a logic 1. The second input to the exclusive OR gate (U3B) switches between a logic 1 and a logic 0 periodically such that the output of the exclusive OR gate (U3B) switches between the voltage level of a logic 1 and the voltage level of a logic 0 with a 50 percent duty cycle. An exclusive OR gate (U3C) is also used as a phase detector (U3 C) to detect the phase difference between a clock signal derived from the phase locked loop oscillator output and the received data. The phase detector (U3C) output is compared (U4) to the reference voltage; any difference therebetween adjusts the input voltage to the voltage controlled oscillator and therefore the output frequency of the oscillator (Q1) to maintain a phase difference between the clock signal (CLK) derived from the oscillator (Q1) output and the clock signal in the incoming data to permit sampling the incoming data at a 90 degree phase shift.

46823441, Jul 21, 1987

Jul 30, 1985

6/760686

Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H04L 2712
H03C 300

375 62

An improved transmitter circuit for rf modems usable for communication in local area computer networks is provided. The transmitter circuit includes a digital/analog conversion circuit for generating a frequency modulated carrier from an input data signal, and a switched linear amplifier for amplifying and controlling the frequency modulated analog signal under the direction of the LAN protocol. The conversion circuit includes a time balanced compensated switching circuit for maintaining duty cycle integrity, while the switched linear amplifier provides on/off carrier control and level adjustment with minimum signal distortion including switching transients, and with minimum spurious signal leakage when off.

47730820, Sep 20, 1988

Nov 17, 1986

6/931576

Gerald L. Somer - Sebastopol CA
Patrick K. Walp - Penngrove CA

AMP Incorporated - Harrisburg PA

H03K 102
G06F 738

375 60

A binary transversal filter (200) in which the delay line of flip-flops (A-L, A'-L') is driven by timing signals (CLK, CLK*, CLKD, CLKD*) that are the same clock rate as the clock rate (CLK) of the encoded binary signals (IMPULSE 0, IMPULSE 1) being introduced into the delay line forming the binary transversal filters (200). The timing signal (CLK, CLK*, CLKD, CLKD*) that time or clock the stages of the delay line (A-L, A'-L') are phases of the clock (CLK) that introduces the encoded binary signals (IMPULSE 0, IMPULSE 1) into the delay line (A-L, A'-L'). Two substantially identical binary transversal filters (200a, 200b) are used to convert two encoded binary data streams (IMPULSE 0, IMPULSE 1) into a duobinary signal. The output of the two binary transversal filters (200a, 200b) are summed (Q2) and passed to a programmable amplifier (210), the gain of which is turned on when there is data in the encoded binary signals (IMPULSE 0, IMPULSE 1) to be converted and transmitted and is turned off otherwise. The carrier is prevented from being applied to the transmission medium (218) when the last bit of data in the encoded binary signals (IMPULSE 0, IMPULSE 1) has been converted to duobinary data by a binary transversal filter (200a, 200b) and applied to the medium (218).

50399560, Aug 13, 1991

Aug 15, 1989

7/394290

Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H03L 799
H03B 512

331 36C

A diode tuned resonant circuit (42) with an inductor (L1) a first variable reactance diode (VAR1) connected in parallel with the inductor (L1), and a second variable reactance diode (VAR2) connected in series with the parallel combination of the inductor (L1) and first diode (VAR1) is used in an oscillator circuit. The resonant frequency of the circuit may be adjusted over a relatively broad frequency range while maintaining a relatively constant Q-factor by applying a biasing voltage to the first and second diodes (VAR1, VAR2).

52532720, Oct 12, 1993

Mar 1, 1991

7/632434

Kevin A. Jaeger - Glen Ellen CA
Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H04K 2503
H04H 2549

375 60

A digital data transmission system includes a transmitter connected to a receiver by a twisted pair. A digital transversal filter, included in the transmitter, supplies output signals to one of four resistor banks, as determined by an automatic selection system that selects one of the resistor banks based on the measured transmission characteristics of the twisted pair. The output signals are weighted by the resistors of the selected resistor bank, summed, and used to generate the transmitted pulse. The values of the resistors of each resistor bank are chosen to shape the transmitted pulse for a respective length of transmission medium so that, after distortion by the transmission medium, the transmitted pulse more nearly corresponds to the ideal pulse shape for which the receiver is designed.

47409967, Apr 26, 1988

Nov 17, 1986

6/932140

Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H04B 116

375 76

The receiver of a radio frequency modem (10) achieves temperature and component independence in two steps. The receiver accomplishes detection in unbalanced parallel paths (Q45, Q47; Q44, Q46) such that the diode drops of transistor base-to-emitter junctions in each path offsets those in the other path whereby temperature dependence of components does not adversely affect the operation of the receiver. Any residual base-to-emitter junction offset causes floating of the quiescent bias of the circuits. The floating is further removed by using the same ladder network (R119, R120, R121, R122, R136) to derive all references (60, 61, 62, 63), automatic gain control (63) as well as slicing levels (60, 61, 62). This minimizes the number of circuit components as compared, for example, to using balanced amplifiers. Detectors (Q45, R105, C89, Q47, R108; Q44, R106, C86, Q46, R107, C87) employed in the two unbalanced paths utilize two stages of detection rather than a single stage of detection so as to minimize distortion.

52992306, Mar 29, 1994

Dec 21, 1990

7/632433

Kevin A. Jaeger - Glen Ellen CA
Gerald L. Somer - Sebastopol CA

The Whitaker Corporation - Wilmington DE

H04L 2549

375 60

A digital data transmission system includes a transmitter connected to a receiver by a twisted pair. A digital transversal filter, included in the transmitter, supplies output signals to a resistor bank. The output signals are weighted by the resistors of the resistor bank, summed, and used to generate the transmitted pulse. The values of the resistors are chosen to predistort the transmitted pulse so that, after distortion by the transmission medium, the transmitted pulse more nearly corresponds to the ideal pulse shape for which the receiver is designed.

47346574, Mar 29, 1988

Nov 17, 1986

6/931765

Gerald L. Somer - Sebastopol CA

AMP Incorporated - Harrisburg PA

H03B 532

331116R

A channel switching oscillator circuit (230) in which the oscillator frequency is selected from one of a predetermined number of frequencies by switching into the oscillator circuit (230) one of a plurality of tank circuits (L4, L5, L6). The tank circuit (L4, L5, L6) is resonant with one of a plurality of crystals (Y2, Y3, Y4) in the oscillator (230) to generate a carrier signal at the predetermined frequency. The crystals (Y2, Y3, Y4) remain in the oscillator circuit (230) with no switching thereof as the frequencies at which the crystals (Y2, Y3, Y4) oscillate are sufficiently far apart, coupled with the high Q of the tank circuit (L4, L5, L6), that only one of the crystals (Y2, Y3, Y4) is resonant with each tank circuit (L4, L5, L6).