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Mark Frigaard Phones & Addresses

  • 1600 23Rd Ave NW, Saint Paul, MN 55112 (651) 639-0404
  • 1600 23Rd St, New Brighton, MN 55112 (651) 639-0404
  • 8643 Greenbelt Rd, Greenbelt, MD 20770 (301) 552-4495
  • Laurel, MD
  • Cooperstown, ND
  • Grand Forks, ND

Work

Company: Medtronic inc. cardiac rhythm disease management Dec 2000 Position: Principal ic design engineer

Education

School / High School: Johns Hopkins University 1998 Specialities: M.S in Electrical Engineering

Skills

Asic • Integrated Circuit Design • Embedded Systems • Electronics • Ic • Medical Devices • Testing • System Design • Verilog • Low Power Design • Design For Manufacturing • Dft • Simulations • Biomedical Engineering • Mixed Signal • Analog • Fpga • Hardware Architecture • Debugging • Firmware • Hardware • Cmos • Semiconductors • Circuit Design • Spectre • Soc • Signal Processing • Microcontrollers • Rtl Design • Digital Signal Processing • Sensors • Failure Analysis • Digital Signal Processors • Microprocessors • System Architecture • Electrical Engineering • Perl • Test Engineering • Functional Verification • Digital Ic Design • Tcl • Modelsim • Xilinx • Vhdl • Eda • Systems Design • Integrated Circuits • Application Specific Integrated Circuits

Industries

Semiconductors

Resumes

Resumes

Mark Frigaard Photo 1

Senior Principal Hardware Engineer

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Location:
1600 23Rd St, New Brighton, MN 55128
Industry:
Semiconductors
Work:
Mark Frigaard Engineering Ventures
Senior Principal Hardware Engineer

Micron Technology Sep 1, 2011 - 2016
Asic Design Engineer

Medtronic 2000 - Jun 2011
Principal Ic Design Engineer

Nasa Goddard Space Flight Center 1996 - 2000
Hardware Engineer

Nasa Goddard Space Flight Center Jul 1989 - 1996
Flight Software Engineer
Education:
The Johns Hopkins University 1998 - 1998
Masters, Master of Science In Electrical Engineering, Electrical Engineering, Engineering, Design
The Johns Hopkins University 1994 - 1994
Master of Science, Masters, Applied Physics
University of North Dakota 1984 - 1989
Bachelors, Bachelor of Science In Electrical Engineering, Bachelor of Science, Electrical Engineering, Physics, Engineering
Cooperstown Central High School
Cooperstown High School
Skills:
Asic
Integrated Circuit Design
Embedded Systems
Electronics
Ic
Medical Devices
Testing
System Design
Verilog
Low Power Design
Design For Manufacturing
Dft
Simulations
Biomedical Engineering
Mixed Signal
Analog
Fpga
Hardware Architecture
Debugging
Firmware
Hardware
Cmos
Semiconductors
Circuit Design
Spectre
Soc
Signal Processing
Microcontrollers
Rtl Design
Digital Signal Processing
Sensors
Failure Analysis
Digital Signal Processors
Microprocessors
System Architecture
Electrical Engineering
Perl
Test Engineering
Functional Verification
Digital Ic Design
Tcl
Modelsim
Xilinx
Vhdl
Eda
Systems Design
Integrated Circuits
Application Specific Integrated Circuits
Mark Frigaard Photo 2

Mark Frigaard New Brighton, MN

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Work:
Medtronic Inc. Cardiac Rhythm Disease Management

Dec 2000 to 2000
Principal IC Design Engineer

Medtronic Inc. Cardiac Rhythm Disease Management

2004 to 2006
DSP Team Lead

Century College
Mahtomedi, MN
Jan 2004 to May 2005
Adjunct Engineering Professor

Medtronic Inc.
Fridley, MN
2000 to 2003
Testability Liason

NASA's Goddard Space Flight Center
Greenbelt, MD
1996 to Dec 2000
Hardware Engineer

National Aeronautics and Space Administration's Goddard Space Flight Center
Greenbelt, MD
1995 to 1996
Systems Engineer

National Aeronautics and Space Administration's Goddard Space Flight Center
Greenbelt, MD
1994 to 1995
Lead Engineer

National Aeronautics and Space Administration's Goddard Space Flight Center
Greenbelt, MD
1989 to 1994
Flight Software Engineer

Education:
Johns Hopkins University
1998
M.S in Electrical Engineering

Johns Hopkins University
1994
M.S. in Applied Physics

University of North Dakota
1989
B.S. in Electrical Engineering

University of North Dakota
1989
B.S. in Engineering Physics

University of North Dakota
1989
B.A. in Honors Studies

University of North Dakota
1989
B.S. in Physics

Publications

Us Patents

Implantable Medical Device With Low Power Delta-Sigma Analog-To-Digital Converter

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US Patent:
7623053, Nov 24, 2009
Filed:
Sep 26, 2007
Appl. No.:
11/861920
Inventors:
Michael B. Terry - Camas WA, US
Michael W. Heinks - New Brighton MN, US
Joel A. Anderson - Brooklyn Park MN, US
Mark A. Frigaard - New Brighton MN, US
Assignee:
Medtronic, Inc. - Minneapolis MN
International Classification:
H03M 1/66
US Classification:
341143, 341155
Abstract:
In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.

Implantable Medical Device With Adjustable Sigma-Delta Analog-To-Digital Conversion Clock Rate

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US Patent:
20080079617, Apr 3, 2008
Filed:
Sep 29, 2006
Appl. No.:
11/536942
Inventors:
Mark A. Frigaard - New Brighton MN, US
Michael W. Heinks - New Brighton MN, US
Joel A. Anderson - Brooklyn Park MN, US
Robert H. Mehregan - East Bethel MN, US
International Classification:
H03M 1/66
US Classification:
341144
Abstract:
An implantable medical device, such as a pacemaker or implantable cardioverter defibrillator, uses digital signal processing channels to process sensed time varying signals representing cardiac activity. Each digital signal processing channels includes a sigma-Delta analog-to-digital converter. The clock rate of each sigma-delta analog-to-digital converter is controlled as a function of a signal detection threshold for its respective digital signal processing channel. For higher threshold levels, a reduced clock rate for the sigma-delta analog-to-digital converter results in reduced power consumption and longer battery life.
Mark A Frigaard from New Brighton, MN, age ~58 Get Report