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Nicholas Duresky Phones & Addresses

  • 2595 Custer Dr, San Jose, CA 95124
  • 1936 Jonathan Ave, San Jose, CA 95125 (408) 264-0678
  • Campbell, CA
  • Superior, CO
  • 1150 Beethoven Cmn, Fremont, CA 94538 (510) 790-7791
  • Superior, CO
  • Durango, CO
  • Boulder, CO
  • Houston, TX
  • 2595 Custer Dr, San Jose, CA 95124 (408) 261-1598

Work

Position: Professional/Technical

Education

Degree: Associate degree or higher

Publications

Us Patents

Asynchronous Communication Protocol Using Efficient Data Transfer Formats

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US Patent:
6889267, May 3, 2005
Filed:
Nov 26, 2002
Appl. No.:
10/304629
Inventors:
Nicholas Duresky - San Jose CA, US
Sameer Nanavati - Fremont CA, US
Sunil Chaudhari - Milipitas CA, US
Corey Gee - Fremont CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F013/00
US Classification:
710 31, 710 38, 710 52
Abstract:
An embodiment of the present invention includes first and second storage elements. The first storage element stores request information transmitted from a first processor operating at a first frequency. The first and second processors operate at different frequencies. The request information is organized according to a request format. The second storage element stores response information transmitted by a second processor operating at a second frequency different than the first frequency in response to the request information. The response information is organized according to a response format.

Multilevel Fair Priority Round Robin Arbiter

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US Patent:
7143219, Nov 28, 2006
Filed:
Dec 31, 2002
Appl. No.:
10/335577
Inventors:
Sunil C. Chaudhari - Milpitas CA, US
Jonathan W. Liu - Campbell CA, US
Manan Patel - San Jose CA, US
Nicholas E. Duresky - San Jose CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 13/00
US Classification:
710111, 710117, 710121, 710243
Abstract:
A method and apparatus for controlling access to a plurality of resources based on multiple received requests is provided. The system includes a priority register configured to receive each individual request, determine a priority for the request, and transmit the request to a priority appropriate path. A first high priority arbiter receives and arbitrates among highest priority requests in a round robin manner to determine a high priority suggested grant vector. At least one lower priority arbiter receiving and arbitrating among lower priority requests in a round robin manner to determine at least one lower priority suggested grant vector. Grant circuitry passes the high priority suggested grant vector unless said grant circuitry receives a low priority indication, whereby the grant circuitry passes a lower priority grant vector.

Dsp Interface For Packet Processing

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US Patent:
20040136397, Jul 15, 2004
Filed:
Dec 31, 2002
Appl. No.:
10/334225
Inventors:
Bapi Vinnakota - Fremont CA, US
Sameer Nanavati - Fremont CA, US
Saurin Shah - Santa Clara CA, US
Nicholas Duresky - San Jose CA, US
International Classification:
H04L012/56
US Classification:
370/462000, 710/112000, 370/389000
Abstract:
A method, apparatus, and system for communicating between a digital signal processor (DSP) and a packet processor.

Resource Sharing Apparatus, Systems, And Methods

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US Patent:
20060020718, Jan 26, 2006
Filed:
Jun 28, 2004
Appl. No.:
10/880153
Inventors:
Nicholas Duresky - San Jose CA, US
Sreenath Kurupati - Santa Clara CA, US
International Classification:
G06F 3/00
US Classification:
710011000
Abstract:
An apparatus and a system, as well as a method and article, may operate to interchangeably store audio data associated with an audio interface protocol selected from a plurality of audio interface protocols in a polymorphic memory structure capable of being coupled to a common digital input-output interface.
Nicholas Edward Duresky from San Jose, CA, age ~48 Get Report