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Orhan J Norman

from Fort Collins, CO
Age ~61
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Also known as:
Norman Orhan, Norman Othan
Phone and address:
2308 Silver Oaks Dr, Fort Collins, CO 80526
(970) 225-2218
Related to:
Kuei Mei Chen, 86Teoman N NormanPaul Choung Yih, 84Peter A Chen, 54Yih Choung ChenJames C Chen, 60Mei L Chen, 63Julie M Chen, 58Anny K Chen, 86
Connected to:
Alishia N Norman, 47Ari A Norman, 43Avery W Norman, 29Ben F Norman, 102Bessie L Norman, 42Brady L Norman, 69Britny N Norman, 34Carter T Norman, 55Chelsae L Norman, 28Cheryl L Norman, 60

Orhan Norman Phones & Addresses

  • 2308 Silver Oaks Dr, Fort Collins, CO 80526 (970) 225-2218
  • Bethlehem, PA

Resumes

Resumes

Orhan Norman Photo 1

Engineering Manager

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Location:
Fort Collins, CO
Industry:
Semiconductors
Work:
Intel Corporation
Engineering Manager
Texas Instruments 2012 - 2015
Design Director
National Semiconductor 1999 - 2011
Design Manager
National Semiconductor 1996 - 2000
Principal Designer
Comlinear Corp Jun 1, 1990 - Jan 1, 1996
Member of Technical Staff, Advanced Products Group
Education:
Lehigh University 1986 - 1990
Doctorates, Doctor of Philosophy, Electronics Engineering, Philosophy Lehigh University 1984 - 1986
Masters, Electronics Engineering Middle East Technical University 1980 - 1984
Bachelors, Bachelor of Science, Electronics Engineering
Skills:
Semiconductors
Mixed Signal
Ic
Asic
Cmos
Semiconductor Industry
Soc
Electronics
Analog Circuit Design
Circuit Design
Integrated Circuit Design
Analog
Engineering Management
Hardware Architecture
Product Development
Power Management
System on A Chip
Technical Staff Management
Technical Product Management
Technical Resource Management
Eda
Application Specific Integrated Circuits
Interests:
Children
Languages:
Turkish
German
English
Orhan Norman Photo 2

Orhan Norman

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Publications

Us Patents

Error Correction Architecture For Pipeline Analog To Digital Converters

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US Patent:
63042045, Oct 16, 2001
Filed:
Apr 11, 2000
Appl. No.:
9/546992
Inventors:
Orhan Norman - Fort Collins CO
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03M 138
US Classification:
341161
Abstract:
A pipeline analog to digital converter architecture includes at least two error correction stages, one such error correction stage at the end of the pipeline architecture such that power savings and silicon area optimization are achieved by tailoring the performance of the pipeline stages towards the end of the pipeline architecture. The other error correction stages are placed with respect to the overall design sensitivities. The design according to the present invention is applicable to a broad class of pipeline architectures including multi-bit stages in the pipeline architecture.

Error Correction Architecture For Pipeline Analog To Digital Converters

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US Patent:
61248207, Sep 26, 2000
Filed:
Nov 20, 1997
Appl. No.:
8/975435
Inventors:
Orhan Norman - Fort Collins CO
Assignee:
National Semiconductor Corporation - Santa Clara CA
International Classification:
H03M 138
US Classification:
341161
Abstract:
A pipeline analog to digital converter architecture includes at least two error correction stages, one such error correction stage at the end of the pipeline architecture such that power savings and silicon area optimization are achieved by tailoring the performance of the pipeline stages towards the end of the pipeline architecture. The other error correction stages are placed with respect to the overall design sensitivities. The design according to the present invention is applicable to a broad class of pipeline architectures including multi-bit stages in the pipeline architecture.
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Orhan J Norman from Fort Collins, CO, age ~61 Get Report