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Raghu Sagar Madala

from San Diego, CA
Age ~41
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Also known as:
Raghu S Madala, R Sagar Madala, R Madala
Connected to:
Deepak Madala, 44Srinivas Madala, 51Sandra R Madaleno, 37Rajesh K Madamanchi, 43Jennifer A Madamba, 42Juan P Madamba, 67Mannes Madamba, 81Nick B Madamba, 58Panagiotis P Madamopoulos, 55Bhawna Madan, 45

Raghu Madala Phones & Addresses

  • San Diego, CA
  • Portland, OR
  • Hillsboro, OR
  • Cincinnati, OH

Resumes

Resumes

Raghu Madala Photo 1

Digital Designer At Qualcomm Inc

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Location:
Greater San Diego Area
Industry:
Wireless
Raghu Madala Photo 2

Senior Technical Program Manager And Product Manager

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Location:
San Diego, CA
Industry:
Semiconductors
Work:
Qualcomm Inc since Aug 2006
Digital Designer
Qualcomm Inc Jul 2005 - Jan 2006
Digital Verification
Education:
University of Cincinnati 2004 - 2006
MS, VLSIThesis include working on the modeling of devices using VHDL-AMS for speed and accuracy. Koneru Lakshmaiah College of Engineering 2000 - 2004
Bachelors, Electronics and Computer EngineeringObtained broad knowledge of Electronics and Computer Engineering that helped me in my advanced degree in VLSI University of California, San Diego
Vignan Vidyalayam
Skills:
Asic
Fpga
Semiconductors
Program Management
Embedded Systems
Product Management
Business Strategy
Project Management
Soc
Strategic Planning
Global Business Development
Application Specific Integrated Circuits
System on A Chip
Data Center
Artificial Intelligence
Cloud Computing
Analytical Skills
Storage Solutions
Data Center Virtualization
Deep Learning
Memory Management
Virtual Reality
Interests:
International Trade
Government Affairs
Children
Strategy and Business Development
Automotive
Computer Graphics
Environment
Education
Science and Technology
Human Rights
International Development
Monetary Policy
Emerging Wireless Technologies
Gaming
Poverty Alleviation
Disaster and Humanitarian Relief
Cost Benefit Analysis
Economic Empowerment
Machine Learning
Indigenous Innovation Policy In China
Game Theory
Certifications:
Project Management Professional (Pmp)
Certified Scrummaster® (Csm)
Amazon Web Services Cloud Practitioner
Raghu Madala Photo 3

Digital Designer At Qualcomm

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Location:
Greater San Diego Area
Industry:
Telecommunications

Publications

Us Patents

Multi-Bit Magnetic Tunnel Junction Memory And Method Of Forming Same

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US Patent:
20130187247, Jul 25, 2013
Filed:
Jan 23, 2012
Appl. No.:
13/356530
Inventors:
Wenqing WU - San Diego CA, US
Sean Li - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Raghu Sagar Madala - San Diego CA, US
Seung H. Kang - San Diego CA, US
Kendrick H. Yuen - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
H01L 29/82
H01L 21/8246
US Classification:
257421, 438 3, 257E29323, 257E21665
Abstract:
A spin-torque transfer (STT) magnetic tunnel junction (MTJ) memory includes a unitary fixed magnetic layer, a magnetic barrier layer on the unitary fixed magnetic layer, a free magnetic layer having a plurality of free magnetic islands on the magnetic barrier layer, and a cap layer overlying the free magnetic layer. Also a method of forming an STT-MTJ memory.

Multi-Free Layer Mtj And Multi-Terminal Read Circuit With Concurrent And Differential Sensing

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US Patent:
20130201757, Aug 8, 2013
Filed:
Aug 16, 2012
Appl. No.:
13/586934
Inventors:
Xia Li - San Diego CA, US
Wenqing Wu - San Diego CA, US
Jung Pill Kim - San Diego CA, US
Xiaochun Zhu - San Diego CA, US
Seung H. Kang - San Diego CA, US
Raghu Sagar Madala - San Diego CA, US
Kendrick H. Yuen - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G11C 11/14
H01L 29/82
US Classification:
365171, 257421, 257E29323
Abstract:
A multi-free layer magnetic tunnel junction (MTJ) cell includes a bottom electrode layer, an anti-ferromagnetic layer on the bottom electrode layer, a fixed magnetization layer on the anti-ferromagnetic layer and a barrier layer on the fixed magnetization layer. A first free magnetization layer is on a first area of the barrier layer, and a capping layer is on the first free magnetization layer. A free magnetization layer is on a second area of the barrier layer, laterally displaced from the first area, and a capping layer is on the second free magnetization layer. Optionally current switches establish a read current path including the first free magnetization layer concurrent with not establishing a read current path including the second free magnetization layer. Optionally current switches establishing a read current path including the first and second free magnetization layer.

Spin Torque Transfer Magnetic Tunnel Junction Intelligent Sensing

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US Patent:
20130245999, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/420890
Inventors:
Abhishek Banerjee - San Diego CA, US
Raghu Sagar Madala - San Diego CA, US
Wenqing Wu - San Diego CA, US
Kendrick H. Yuen - San Diego CA, US
Chengzhi Pan - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G06F 17/18
US Classification:
702181
Abstract:
Sensor circuitry including probabilistic switching devices, such as spin-transfer torque magnetic tunnel junctions (STT-MTJs), is configured to perform ultra-low power analog to digital conversion and compressive sensing. The analog to digital conversion and compressive sensing processes are performed simultaneously and in a manner that is native to the devices due to their probabilistic switching characteristics.

Waveform Caching For Data Demodulation And Interference Cancellation At A Node B

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US Patent:
20080301367, Dec 4, 2008
Filed:
May 20, 2008
Appl. No.:
12/123982
Inventors:
Senthil Govindaswamy - San Diego CA, US
Jeffrey A. Levin - San Diego CA, US
Raghu Sagar Madala - San Diego CA, US
Sharad Deepak Sambhwani - San Diego CA, US
Assignee:
QUALCOMM Incorporated - San Diego CA
International Classification:
G06F 12/08
US Classification:
711118, 711E12052, 711E12017
Abstract:
The present patent application discloses a method and apparatus for using external and internal memory for cancelling traffic interference comprising storing data in an external memory; and processing the data samples on an internal memory, wherein the external memory is low bandwidth memory; and the internal memory is high bandwidth on board cache. The present method and apparatus also comprises caching portions of the data on the internal memory, filling the internal memory by reading the newest data from the external memory and updating the internal memory; and writing the older data back to the external memory from the internal memory, wherein the data is incoming data samples.

Contactless Data Communication Using In-Plane Magnetic Fields, And Related Systems And Methods

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US Patent:
20170019153, Jan 19, 2017
Filed:
Sep 29, 2016
Appl. No.:
15/280119
Inventors:
- San Diego CA, US
Senthil Kumar Govindaswamy - Bangalore, IN
Raghu Sagar Madala - San Diego CA, US
Peiyuan Wang - San Diego CA, US
Kendrick Hoy Leong Yuen - San Diego CA, US
David Joseph Winston Hansquine - Raleigh NC, US
International Classification:
H04B 5/00
H04W 4/00
Abstract:
Embodiments described herein are related to contactless data communication. Related systems and methods for contactless data communication are disclosed herein. For example, a magnetic field-based contactless transmitter is disclosed that includes a substrate, a pair of dipole coils disposed on the substrate, and a drive circuit electrically coupled to the pair of dipole coils. To transmit data to a magnetic tunnel junction (MTJ) receiver disposed on a second substrate, the drive circuit is configured to drive the pair of dipole coils so as to generate a magnetic field in-plane to the MTJ receiver. Data can be transmitted from the magnetic field-based contactless transmitter to the MTJ receiver using the magnetic field.

High Density Low Power Gshe-Stt Mram

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US Patent:
20150213865, Jul 30, 2015
Filed:
Aug 5, 2014
Appl. No.:
14/451510
Inventors:
- San Diego CA, US
Raghu Sagar MADALA - San Diego CA, US
Kendrick Hoy Leong YUEN - San Diego CA, US
Karim ARABI - San Diego CA, US
International Classification:
G11C 11/16
G11C 11/18
H01L 43/14
Abstract:
Systems and methods are directed to a memory element comprising a hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) element, which includes a GSHE strip formed between a first terminal (A) and a second terminal (B), and a magnetic tunnel junction (MTJ), with a free layer of the MTJ interfacing the GSHE strip, and a fixed layer of the MTJ coupled to a third terminal (C). The orientation of the easy axis of the free layer is perpendicular to the magnetization created by electrons traversing the GSHE strip between the first terminal and the second terminal, such that the free layer of the MTJ is configured to switch based on a first charge current injected from/to the first terminal to/from the second terminal and a second charge current injected/extracted through the third terminal into/out of the MTJ via the third terminal (C).

High Density Low Power Gshe-Stt Mram

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US Patent:
20150213866, Jul 30, 2015
Filed:
Sep 8, 2014
Appl. No.:
14/479832
Inventors:
- San Diego CA, US
Raghu Sagar MADALA - San Diego CA, US
Kendrick Hoy Leong YUEN - San Diego CA, US
Karim ARABI - San Diego CA, US
International Classification:
G11C 11/16
G11C 11/18
H01L 43/14
Abstract:
Systems and methods are directed to a memory element comprising a hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) element, which includes a GSHE strip formed between a first terminal (A) and a second terminal (B), and a magnetic tunnel junction (MTJ), with a free layer of the MTJ interfacing the GSHE strip, and a fixed layer of the MTJ coupled to a third terminal (C). The orientation of the easy axis of the free layer is perpendicular to the magnetization created by electrons traversing the GSHE strip between the first terminal and the second terminal, such that the free layer of the MTJ is configured to switch based on a first charge current injected from/to the first terminal to/from the second terminal and a second charge current injected/extracted through the third terminal into/out of the MTJ via the third terminal (C).

Spintronic Logic Gates Employing A Giant Spin Hall Effect (Gshe) Magnetic Tunnel Junction (Mtj) Element(S) For Performing Logic Operations, And Related Systems And Methods

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US Patent:
20150145575, May 28, 2015
Filed:
Jul 14, 2014
Appl. No.:
14/330494
Inventors:
- San Diego CA, US
Raghu Sagar Madala - San Diego CA, US
Kendrick Hoy Leong Yuen - San Diego CA, US
Karim Arabi - San Diego CA, US
Robert Philip Gilmore - Poway CA, US
International Classification:
H03K 3/45
H03K 19/20
H03K 3/012
H03K 3/037
US Classification:
327187
Abstract:
Aspects described herein are related to spintronic logic gates employing a Giant Spin Hall Effect (GSHE) magnetic tunnel junction (MTJ) element(s) for performing logical operations. In one aspect, a spintronic logic gate is disclosed that includes a charge current generation circuit and a GSHE MTJ element. The charge current generation circuit is configured to generate a charge current representing an input bit set. The input bit set may include one or more input bit states for a logical operation. The GSHE MTJ element is configured to set a logical output bit state for the logical operation, and has a threshold current level. The GSHE MTJ element is configured to generate a GSHE spin current in response to the charge current and perform the logical operation on the input bit set by setting the logical output bit state based on whether the GSHE spin current exceeds the threshold current level.
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Raghu Sagar Madala from San Diego, CA, age ~41 Get Report