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Raviprakash Suma Nagaraj

from Portland, OR
Age ~63
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Also known as:
Raviprakas Nagaraj, Ravi Nagaraj, Ravipraka Nagaraj, Raviprakash Nagara, Nagaraj Raviprakash, Nagara J Raviprakash
Phone and address:
13112 Woodshire Ln, Portland, OR 97223
Related to:
Hach H Nguyen, 55Michelle Thi Nguyen, 63Vivek C Nagaraj, 51Suma Raviprakash, 56Vincent Q Nguyen, 35Ramya Ramchand, 49Vivian T Nguyen, 37Suma Nagaraj, 63
Connected to:
Anand NagarajanChirayu Nagaraju, 40Dhamodharan NagarajanDilip B Nagarajan, 45Gomathi Nagaraj, 57Harish D Nagaraja, 39Nandini Nagarajan, 49Navya Nagaraju, 39Radhakrishna Nagaraj, 68Rajendran Nagarajan, 41

Raviprakash Nagaraj Phones & Addresses

  • 13112 Woodshire Ln, Portland, OR 97223
  • Tigard, OR
  • Vancouver, WA
  • San Jose, CA
  • Murrieta, CA
  • Hillsboro, OR
  • Lakeville, MN
  • Northfield, MN
  • Riverside, CA

Education

Degree: Graduate or professional degree

Resumes

Resumes

Raviprakash Nagaraj Photo 1

Raviprakash Nagaraj

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Publications

Us Patents

High Speed Bus Contact System

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US Patent:
6503091, Jan 7, 2003
Filed:
Oct 2, 2001
Appl. No.:
09/969457
Inventors:
Frank P. Hart - Beaverton OR
Raviprakash Nagaraj - Hillsboro OR
Leonard O. Turner - Vancouver WA
Arthur L. Spurrell - Tualatin OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01R 13648
US Classification:
439108, 439 68
Abstract:
The present invention is a memory bus connector for accommodating a memory module that is parallel to a motherboard. The memory bus connector of the present invention has a plurality of individual contacts that act as data signal contacts and/or ground members that connect to the lower portion the parallel memory module. The memory bus connector of the present invention also has a sheet grounding member that connects to the upper portion of the memory module.

Low Power Optimized Voltage Regulator

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US Patent:
7679340, Mar 16, 2010
Filed:
Jun 29, 2007
Appl. No.:
11/823973
Inventors:
Krishnan Ravichandran - Saratoga CA, US
Raviprakash Nagaraj - Tigard OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G05F 3/16
US Classification:
323224
Abstract:
Methods and apparatus relating to low power optimized voltage regulators are described. In one embodiment, a voltage regulator controller may cause leakage current from a load to drain a capacitor (e. g. , coupled in parallel with the load) during a reduced power state.

Gradient Non-Linear Adaptive Power Architecture And Scheme

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US Patent:
20070236973, Oct 11, 2007
Filed:
Mar 31, 2006
Appl. No.:
11/394910
Inventors:
Jaber Qahouq - Beaverton OR, US
Lilly Huang - Portland OR, US
Raviprakash Nagaraj - Tigard OR, US
International Classification:
H02J 1/10
US Classification:
363065000
Abstract:
Techniques related to a power module employing multiple power sub-modules are described. More specifically, an embodiment combines and controls multiple power sub-modules of varying characteristics to improve the overall efficiency of the power module across varying load currents, power outputs, input voltages, and other operating conditions. Moreover, the power module may employ an adaptive non-linear and non-uniform current/power sharing among its power sub-modules. Other embodiments are described and claimed.

Gradient Non-Linear Adaptive Power Architecture And Scheme

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US Patent:
20070248877, Oct 25, 2007
Filed:
Mar 26, 2007
Appl. No.:
11/691331
Inventors:
Lilly Huang - Portland OR, US
Raviprakash Nagaraj - Tigard OR, US
International Classification:
H01M 2/00
G05F 5/00
US Classification:
429121000, 700295000
Abstract:
Techniques related to a power module employing multiple power sub-modules are described. More specifically, an embodiment combines and controls multiple power sub-modules of varying characteristics to improve the overall efficiency of the power module across varying load currents, power outputs, input voltages, and other operating conditions. Moreover, the power module may employ an adaptive non-linear and non-uniform current/power sharing among its power sub-modules. Other embodiments are described and claimed.

Power Device Configuration With Adaptive Control

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US Patent:
20080024012, Jan 31, 2008
Filed:
Jul 27, 2006
Appl. No.:
11/460271
Inventors:
Jaber Abu Qahouq - Beaverton OR, US
Raviprakash Nagaraj - Tigard OR, US
Lilly Huang - Portland OR, US
International Classification:
H02H 3/42
US Classification:
307126
Abstract:
Various embodiments of a power device configuration along with adaptive control mechanisms are described. In one embodiment, for example, an apparatus may comprise multiple power switching devices. One or more of the power switching devices may be selected and/or operated for dynamically controlling the overall or equivalent parasitic effects according to usage conditions or performance under demand. The usage conditions may comprise, for example, load conditions, switching frequency conditions, driver voltage/current, and/or input voltage which affect the power consumption of the power device. Other embodiments are described and claimed.

Low Loss Radio Frequency Signal Communication Within A Package, A Board And/Or A Wave Guide

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US Patent:
20090085200, Apr 2, 2009
Filed:
Sep 28, 2007
Appl. No.:
11/864803
Inventors:
Raviprakash Nagaraj - Tigard OR, US
International Classification:
H01L 23/34
US Classification:
257728, 257E23015
Abstract:
In some embodiments an integrated circuit package includes a coaxial arrangement of one or more ground via surrounding a signal via. The one or more ground via and the signal via extend through the package to allow transmission of signals between an integrated circuit and a board. Other embodiments are described and claimed.

Client Hardware Authenticated Transactions

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US Patent:
20120167194, Jun 28, 2012
Filed:
Dec 22, 2010
Appl. No.:
12/976486
Inventors:
KENNETH W. REESE - Portland OR, US
RAVIPRAKASH NAGARAJ - Tigard OR, US
SANJAY BAKSHI - Portland OR, US
AMOL A. KULKARNI - Hillsboro OR, US
RANJIT S. NARJALA - Portland OR, US
International Classification:
H04L 9/32
G06F 21/00
US Classification:
726 9
Abstract:
In one embodiment a controller comprises logic to receive a request for a credential to authenticate a user for a transaction, in response to a determination that a credential which satisfies the request resides on a memory module, execute an authentication routine to authenticate a user of the controller, in response to a successful authentication, retrieve the credential from the memory module, and provide a token to certify the credential in response to the request. Other embodiments may be described.

Virtual Point Of Sale

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US Patent:
20140074635, Mar 13, 2014
Filed:
Dec 29, 2011
Appl. No.:
13/976166
Inventors:
Kenneth W. Reese - Portland OR, US
Raviprakash Nagaraj - Tigard OR, US
International Classification:
G06Q 20/20
G06Q 20/38
G06Q 20/40
US Classification:
705 21, 705 44
Abstract:
In one embodiment a controller comprises logic to receive a payment request for a purchase transaction, wherein the payment request comprises transaction information associated with the purchase transaction, present at least a portion of the transaction information on a user interface, receive payment source data from a remote resource, securely wrap the payment source data and transmit the payment source data to a remote device. Other embodiments may be described.
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Raviprakash Suma Nagaraj from Portland, OR, age ~63 Get Report