Dennis L. Immer - Mesa AZ Michael S. Millhollan - Tempe AZ Ronald L. Treadway - Scottsdale AZ
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
G11C 1700
US Classification:
365 96
Abstract:
A programmable read-only memory circuit including a plurality of fusible link memory cells is disclosed in which a first auxiliary current source is employed to selectively isolate a cell location to be volatized during memory personalization and a second auxiliary current source is employed to volatize or personalize a fusable link in the selected memory cell for insuring complete volatilization of the fusible link.
Michael S. Millhollan - Mesa AZ Ronald L. Treadway - Scottsdale AZ
Assignee:
Motorola, Inc. - Chicago IL
International Classification:
G11C 800 H03K 520 H04Q 900
US Classification:
340166R
Abstract:
An N-bit binary address decoder suitable for use in an emitter-coupled logic bipolar random access memory (RAM) is provided. Each of the N address input signals is applied to an input terminal and is level shifted and applied to the input node of an emitter-coupled logic inverter. The outputs of the emitter-coupled logic inverter are the collectors of the emitter-coupled transistors on which complementary output signals representative of the corresponding binary address input signal are produced. The complementary output signals generated by the N inverters are connected to 2. sup. N AND gates to form the possible 2. sup. N minterm combinations. Each of the AND gates includes a load resistor coupled to a power supply and N Schottky diodes having their anodes coupled to the load resistor and their cathodes coupled to the corresponding address inverter output terminals. The anodes of the input diodes of each AND gate are also connected to the base of a transistor, the emitter of which produces the signal representing the corresponding minterm function generated by that AND gate.
Sense-Write Circuit For Bipolar Integrated Circuit Ram
Michael S. Millhollan - Mesa AZ Ronald L. Treadway - Scottsdale AZ
Assignee:
Motorola, Inc. - Chicago IL
International Classification:
G11C 1144
US Classification:
340173FF
Abstract:
A bipolar sense-write circuit is provided for sensing voltage levels representative of a logical "1" or "0" stored in a flip-flop storage cell and for writing voltage levels into the flip-flop storage cell. The sense-write circuit includes first and second amplifier stages which, when coupled to a selected flip-flop storage cell produce a voltage in the amplifier section approximately equal to the voltage on a collector node in the flip-flop storage cell. Each amplifier stage of the sense-write circuit utilizes a side of the selected flip-flop storage cell as a part of that amplifier stage, if the corresponding side of the flip-flop storage cell is "on". The amplifier stage connected to the "on" side of the selected flip-flop storage cell acts as a unity gain amplifier, such that the row selection voltage appears at the output of that amplifier stage. This arrangement allows the data stage of memory cell flip-flop to be sensed without the use of any fixed reference voltage generated external to the memory cell. The arrangement provides the additional benefit of reducing the required difference between the internal memory cell flip-flop voltages, proportionately decreasing the time required to write a given state into the flip-flop memory cell.
