Stephen M Trimberger

20210165436, Jun 3, 2021

Dec 8, 2020

17/115478

- San Jose CA, US
Stephen M. TRIMBERGER - Incline Village NV, US

G05F 1/575
G05F 1/46

Apparatuses and methods relating generally to reduction of allocation of external power and/or ground pins of a microelectronic device are disclosed. In one such apparatus, an external power input pin is configured for receiving an input supply-side power having an external supply voltage level higher than an internal supply voltage level and an external supply current level lower than an internal supply current level. An internal power plane circuit coupled to the external power input pin is configured to step-down a voltage from the external supply voltage level to the internal supply voltage level and to step-up a current from the external supply current level to the internal supply current level to provide an internal power source.

20200161247, May 21, 2020

Jan 27, 2020

16/773501

- San Jose CA, US
Sundararajarao MOHAN - Sunnyvale CA, US
Stephen M. TRIMBERGER - Incline Village NV, US

H01L 23/538
H01L 23/50
G06F 15/78

An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.

20190188419, Jun 20, 2019

Dec 18, 2017

15/845958

- San Jose CA, US
Stephen M. Trimberger - Incline Village NV, US

Xilinx, Inc. - San Jose CA

G06F 21/76

An example method of configuring a programmable integrated circuit (IC) in a computer system includes: selecting a first region of a programmable fabric of the programmable IC for implementation of a shell circuit, the shell circuit configured to interface with a bus of the computer system; selecting a second region of the programmable fabric for implementation of an application circuit, the application circuit configured to interface with the shell circuit; providing a fence region disposed between the first region and the second region, the fence region including a set of un-configured tiles of the programmable fabric; generating configuration data for a circuit design having the first region, the second region, and the fence region; and loading the configuration data to the programmable IC.

20190096813, Mar 28, 2019

Sep 28, 2017

15/719288

- San Jose CA, US
Sundararajarao Mohan - Sunnyvale CA, US
Stephen M. Trimberger - Incline Village NV, US

Xilinx, Inc. - San Jose CA

H01L 23/538
H01L 23/50

An example integrated circuit (IC) package includes: a processing system and a programmable IC disposed on a substrate, the processing system coupled to the programmable IC through interconnect of the substrate; the processing system including components coupled to a ring interconnect, the components including a processor and an interface controller. The programmable IC includes: an interface endpoint coupled to the interface controller through the interconnect; and at least one peripheral coupled to the interface endpoint and configured for communication with the ring interconnect of the processing system through the interconnect endpoint and the interface controller.

20160050017, Feb 18, 2016

Aug 13, 2014

14/459070

- San Jose CA, US
Stephen M. Trimberger - Incline Village NV, US

Xilinx, Inc. - San Jose CA

H04B 10/2507
H04B 10/2575

In an adaptation module relating generally to adaptive optical channel compensation, an analysis module is coupled to receive a first data signal and a second data signal and coupled to provide first information and second information. A comparison module is coupled to compare the first information and the second information to provide third information. An adjustment module is coupled to receive the third information to provide fourth information to compensate for distortion in the second data signal with reference to the first data signal. The second data signal is associated with a conversion of the first data signal to an optical signal for communication via an optical channel.

20150358084, Dec 10, 2015

Jun 5, 2014

14/297527

- San Jose CA, US
Stephen M. Trimberger - Incline Village NV, US

Xilinx, Inc. - San Jose CA

H04B 10/50
H04B 10/508
H01L 25/00

Various apparatuses, circuits, systems, and methods for optical communication are disclosed. In some implementations, an apparatus includes a package substrate and f first interposer mounted on the package substrate. The apparatus also includes a logic circuit and an optical interface circuit connected to the logic circuit via the first interposer. One of the optical interface circuit or the logic circuit is mounted on the first interposer. The optical interface circuit includes a driver circuit configured to receive electronic data signals from the logic circuit. The optical interface circuit also includes an optical transmitter circuit coupled to the driver circuit and configured to output optical data signals encoding the electronic data signals.

20150236856, Aug 20, 2015

Feb 20, 2014

14/185780

- San Jose CA, US
Steven E. McNeil - Rio Rancho NM, US
Stephen M. Trimberger - Incline Village NV, US

Xilinx, Inc. - San Jose CA

H04L 9/32

One approach for authenticating data includes storing a plurality of combinations of representations of public keys and session key IDs in a non-volatile memory. A payload and accompanying public key, session key ID, and signature of the payload are input. The signature is a function of the payload and a private key of a key pair that includes the accompanying public key and the private key. Authenticity of the payload is determined based on the accompanying public key and session key ID and the combinations stored in the non-volatile memory, and from the signature and the payload. In response to determining that the payload is authentic, the payload is processed, and in response to determining that the payload is not authentic, processing of the payload is disabled.