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Thomas E Perme

from Gilbert, AZ
Age ~40
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Also known as:
Tom E Perme
Related to:
Carl Perme, 69Patricia Perme, 89Irene Brunner, 98Marie Perme
Connected to:
Monica J Perme, 61Carlos Permell, 57Jennifer Permenter, 50Leon V Permenter, 64Marvin M Permenter, 79Regina PermenterTammy L Permenter, 66Coyle L Permetter, 36Alex Permijo, 69Anthony Permuy, 61

Thomas Perme Phones & Addresses

  • Gilbert, AZ
  • 222 S Eucalyptus Pl, Chandler, AZ 85225 (480) 678-3818
  • Booneville, MS
  • Terre Haute, IN
  • Desoto, TX
  • Maricopa, AZ

Resumes

Resumes

Thomas Perme Photo 1

Thomas Perme

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Location:
United States
Thomas Perme Photo 2

Thomas Perme

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Location:
United States

Publications

Us Patents

Processor Device With Instruction Trace Capabilities

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US Patent:
20130318408, Nov 28, 2013
Filed:
May 6, 2013
Appl. No.:
13/888357
Inventors:
Microchip Technology Incorporated - , US
Justin Milks - Chandler AZ, US
Sundar Balasubramanian - Chandler AZ, US
Thomas Edward Perme - Chandler AZ, US
Kushala Javagal - Phoenix AZ, US
Assignee:
Microchip Technology Incorporated - Chandler AZ
International Classification:
G01R 31/3177
US Classification:
714724
Abstract:
A processor device with debug capabilities has a central processing unit, debug circuitry including a trace module and an external interface, wherein the trace module generates a trace stream including information about executed instructions, wherein the trace stream is output through the external interface, and wherein the trace module is further operable to detect a trigger signal and upon detection to insert a trace packet into the generated trace stream.

Processor Device With Reset Condition Trace Capabilities

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US Patent:
20130297974, Nov 7, 2013
Filed:
May 7, 2013
Appl. No.:
13/888367
Inventors:
Thomas Edward Perme - Chandler AZ, US
Sundar Balasubramanian - Chandler AZ, US
Kushala Javagal - Phoenix AZ, US
Assignee:
Microchip Technology Incorporated - Chandler AZ
International Classification:
G06F 11/26
US Classification:
714 30
Abstract:
A processor device with debug capabilities has a central processing unit, debug circuitry including a trace module, a system clock module for providing internal clock signals, and a reset detection unit which during a debug mode prevents the system clock module from receiving a reset signal.

Device Having Configurable Breakpoint Based On Interrupt Status

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US Patent:
20130297975, Nov 7, 2013
Filed:
May 7, 2013
Appl. No.:
13/888370
Inventors:
Justin Milks - Chandler AZ, US
Sundar Balasubramanian - Chandler AZ, US
Thomas Edward Perme - Chandler AZ, US
Kushala Javagal - Phoenix AZ, US
Assignee:
Microchip Technology Incorporated - Chandler AZ
International Classification:
G06F 11/36
US Classification:
714 3813
Abstract:
A processor device with debug capabilities has a central processing unit, an interrupt controller, a status unit operable to be set into a first mode indicating an interrupt has occurred or in a second mode indicating normal execution of code, and a debug unit coupled with said status unit and comprising a configurable breakpoint, wherein a condition can be set that a breakpoint is only activated if the device is operating in an interrupt service routine.
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Thomas E Perme from Gilbert, AZ, age ~40 Get Report