Search

Robert Szypicyn

from Chandler, AZ
Get Report
Connected to:
John F Szypulski, 69Ewelina M Szyszka, 61Carolyn N Ta, 40Cesar C Ta, 55Dzan Q Ta, 51Ei H Ta, 68Hanh T Ta, 46Huyen Ta, 38Jackson H Ta, 37Kan K Ta, 47

Robert Szypicyn Phones & Addresses

  • Chandler, AZ

Work

Company: Intel corporation Sep 2009 Position: Sr. validation engineer

Education

Degree: Certificate School / High School: New York Institute of Photography 2004 to 2008 Specialities: Professional Photography

Skills

VMM • UVM • Open Verification Methodology • SystemVerilog • Reuse • ASIC • Verilog • Vera • Functional Verification • Specman • AMBA AHB • Logic Synthesis • Formal Verification • SystemC • SoC • PCIe • RTL design • EDA • RTL coding • FPGA

Industries

Semiconductors

Resumes

Resumes

Robert Szypicyn Photo 1

At Intel

View page
Position:
Sr. Validation Engineer at Intel Corporation
Location:
Phoenix, Arizona Area
Industry:
Semiconductors
Work:
Intel Corporation since Sep 2009
Sr. Validation Engineer
RJS Photography Jun 2002 - Jun 2011
Freelance Professional Photographer
Intel Corp. Aug 2007 - Sep 2009
SoC Verification Engineer
Aviom, Inc Jun 2005 - Jun 2007
ASIC Verification Engineer
Synopsys Jul 1998 - Nov 2003
Senior Applications Engineer
Education:
New York Institute of Photography 2004 - 2008
Certificate, Professional Photography Drexel University 1992 - 1997
BS, Electrical Engineering
Skills:
VMM
UVM
Open Verification Methodology
SystemVerilog
Reuse
ASIC
Verilog
Vera
Functional Verification
Specman
AMBA AHB
Logic Synthesis
Formal Verification
SystemC
SoC
PCIe
RTL design
EDA
RTL coding
FPGA
Control profile
Robert Szypicyn from Chandler, AZ Get Report